Reconfigurable Acceleration of Microphone Array Algorithms for Speech Enhancement
| Document type: | Conference Papers |
|---|---|
| Peer reviewed: | Yes |
| Author(s): | Ka Fai Cedric Yiu, Chun Hok Ho, Nedelko Grbic, Yao Lu, Xiaoxiang Shi, Wayne Luk |
| Title: | Reconfigurable Acceleration of Microphone Array Algorithms for Speech Enhancement |
| Conference name: | International Conference on Application-Specific Systems, Architectures and Processors, Proceedings |
| Year: | 2008 |
| Pagination: | 203-208 |
| ISBN: | 978-1-4244-1897-8 |
| Publisher: | IEEE |
| City: | Leuven, Belgium |
| Organization: | Blekinge Institute of Technology |
| Department: | School of Engineering - Dept. of Signal Processing (Sektionen för teknik – avd. för signalbehandling) School of Engineering S- 372 25 Ronneby +46 455 38 50 00 http://www.tek.bth.se/ |
| Language: | English |
| Abstract: | Microphone arrays play an important role in noise reduction and speech enhancement. Their algorithms are based on beamforming, which reduces the level of localized and ambient noise signals while minimizing distortion to speech from the desired direction via spatial filtering. This paper describes a class of subband beamforming algorithms. The similarity between different algorithms is discussed. To enhance computational efficiency, the algorithms are implemented in frequency domain. A hardware architecture, with bitwidth optimization, is proposed to support the algorithms. An implementation with 7 instances on a Xilinx XC4VSX55 FPGA at 175MHz can run 41.7 times faster than the corresponding pure software implementation on a 3.2GHz Pentium 4 PC. ©2008 IEEE. |
| Subject: | Signal Processing\Beamforming |
| Keywords: | Filtering theory, microphone arrays, spatial filters, speech enhancement |
